Synopsys PrimeSim HSPICE: Advanced Noise Analysis for High-Speed SerDes and Memory Interface Design
Synopsys PrimeSim HSPICE provides a comprehensive noise analysis suite — including transient noise Monte Carlo, PSS/PNOISE phase noise simulation, and statistical eye diagram generation — that goes far beyond standard .NOISE sweeps. This article covers the complete HSPICE noise analysis workflow for 56G/112G SerDes and DDR5/LPDDR5 memory interfaces, from jitter decomposition using the dual-Dirac model to BER-extrapolated eye opening measurements. Engineers will learn how to configure transient noise injection, rank noise source contributions to phase noise, and generate compliance-ready eye diagrams at target BER levels.